1. Field of the Invention
The invention relates to pins, and more particularly to pins for a semiconductor device.
2. Description of the Related Art
For a semiconductor package substrate (e.g. a computer main board) with a pin grid array (PGA) package, multiple pins are welded to a surface of the semiconductor package substrate. An electronic component (e.g. a central processing unit) may be electrically connected to the semiconductor package substrate by connecting to the pins.
Generally, there are two types of conventional pins, i.e. round-head pins shown in FIG. 1 and flat-head pins shown in FIG. 2.
As shown in FIG. 1, multiple conventional round-head pins 1 are welded to a semiconductor package substrate M by solder paste S. Here, each round-head pin 1 comprises a round connection head 11 and a pin stem 12 connected to the round connection head 11. Accordingly, the round-head pins 1 can be electrically connected to the semiconductor package substrate M by welding the round connection heads 11 to the semiconductor package substrate M using the solder paste S. Moreover, although a large contact area between the round connection head 11 of each round-head pin 1 and the solder paste S provides superior bonding strength therebetween, the round connection head 11 often cannot be accurately disposed on the semiconductor package substrate M, causing the entire round-head pin 1 to tilt on the semiconductor package substrate M, and further disabling connection between the electronic component and the round-head pins 1.
As shown in FIG. 2, multiple conventional flat-head pins 2 are welded to the semiconductor package substrate M by the solder paste S as well. Here, each flat-head pin 2 comprises a flat connection head 21 and a pin stem 22 connected to the flat connection head 21. Similarly, the flat-head pins 2 can be electrically connected to the semiconductor package substrate M by welding the flat connection heads 21 11 to the semiconductor package substrate M using the solder paste S. Accordingly, although the flat connection head 21 of each flat-head pin 2 can thoroughly contact the surface of the semiconductor package substrate M and thus the flat-head pin 2 is not easily tilted on the semiconductor package substrate M, a small contact area between the flat connection head 21 and the solder paste S provides inferior bonding strength therebetween. Moreover, flux (not shown) is contained in the solder paste S. When the flat connection head 21 of each flat-head pin 2 is welded to the semiconductor package substrate M or the semiconductor package substrate M containing the multiple flat-head pins 2 needs to be proceeded with a reflow welding (or re-welding) process, the flux is often volatilized to generate voids B due to a high temperature. Here, the voids B remain in the solder paste S after the reflow welding process is performed, causing the entire flat-head pin 2 to tilt on the semiconductor package substrate M.